iLAB-Digital is the second volume and is similar to the first volume iLAB Analog for the purpose of using the Analog Discovery module. It is specifically written for electronic circuit design at the Technology-College Level. A total of 13 chapters at 3 hours per week is designed to fit a semester-duration course of study. The first through the sixth chapter cover the basic logic circuit design including Logic Gates, Adders, JKFFs, MUX/DEMUXs, Shift Registers and Counters. Chapter 7 through 11 cover Digital-to-Analog Conversion, Analog-to-Digital Conversion, Clocks, PLLs, Steppers, Drivers, Servos and Controls. Chapter 12 through 13 cover basic logic circuits for Altera and Xilinx platform FPGAs and their corresponding synthesis.
Each chapter contains:
Description of circuit configuration;
VHDL description of the circuit composition simulation;
Layout and implementation of circuit structure;
Using Analog Discovery to test and debug the circuit;
Chapter Exercises to reinforce newly learned content.
The time distribution for coursework success is namely:
For instructor lecture using chapter items 1 through 3 including answering student questions, 1 hour;
Post-lecture, students studying course material by following chapter item 2 for up to 1 hour;
Post lecture, students must repeat the examples given in chapter items 3 to 4 for up to 1 hour;
In addition to completing the end of chapter exercises, students must overcome the unsuccessful simulation and debugging of the circuit using the Analog Discovery module, which is estimated at between 4 to 8 hours.
Required equipment and tools:
Software: VHDL simulation test software may be downloaded from the Altera/Quartus website. If using Xilinx FPGAs for synthesis, the software may be downloaded from the Xilinx/ISE website. Waveform test software is available from Digilent’s website. All of the indicated software is available for download free of charge.
Hardware: From the first through the eleventh chapter, the electronic components specified are common and available at low cost from a wide variety of electronic component shops throughout the island. Chapter 12 of the FPGA implementation requires the Altera/Terasic DE2-115. Chapter 13 of the FPGA implementation requires the Xilinx/Digilent BASYS3. Because iLAB-Digital uses Digilent/Analog Discovery’s Digital Pattern Generator and Logic Analyzer for evaluation, it works nearly independently of the FPGA implementation platform.
Chapter 1 Using NAND Logic Gates to Synthesize Other Logic Gates
Chapter 2 Evaluating the Adder
Chapter 3 JKFF Composition and Evaluation
Chapter 4 Data Selectors and Multiplexers/Demultiplexers
Chapter 5 Shift Registers
Chapter 6 Counters
Chapter 7 Digital to Analog Conversion
Chapter 8 Analog to Digital Conversion
Chapter 9 Clock Generation and PLL
Chapter 10 Stepping Motor and Driver
Chapter 11 Servo System and Control
Chapter 12 The Altera/Quartus DE2-115 FPGA Evaluation Kit
Chapter 13 Xilinx/Vivado Basys3 FPGA Synthesis
Appendix A VHDL Circuit Format and Structure
Appendix B VHDL Testbench Structure and Stimulus File
Appendix C Creating and Using Digital Patterns
Appendix D Using the Logic Analyzer
Appendix E ModelSim Simulation and Testing
Appendix F Using the LM565 PLL
Appendix G Xilinx CPLD Circuit Synthesis