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Fundamentals of Digital and Computer Design with VHDL (絕)

Fundamentals of Digital and Computer Design with VHDL (絕)

  • 20本以上,享 8.5折
售價 $ 洽詢
  • 一般書籍
  • ISBN:9781259007552
  • 作者:Richard S. Sandige, Michael L. Sandige,
  • 版次:1
  • 年份:2012
  • 出版商:McGraw-Hill
  • 頁數/規格:716頁/平裝雙色
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Description
This text is intended for an introductory digital design course for students at the freshman level; it also is intended for an introductory computer design course with assembly language programming for students at the sophomore level. This text uses a spiral teaching approach by introducing a design problem and then, in the same chapter or a later chapter, either (1) reemphasizing the same concepts when a different design is presented, or (2) working the same problem using a different technique. This is done to increase the likelihood of retention.

Features
  • VHDL is introduced in the first chapter using just Boolean functions. This prepares students to use VHDL early in their laboratory experiments. 
  • Helpful information is provided following Figures, Tables, Listings (for VHDL code), and Waveforms in a bulleted section starting with "Things you should notice about..."
  • Homework problems are keys to each section, for instructor and student convenience. Homework solutions will be made available to instructors via the web.
  • Laboratory experiments are included in Appendix A, to connect the theory presented in the book with the real world of modern digital programmable logic devices. Experiment solutions will be made available to instructors via the web. For reviewers: to see examples of Experiments for Chapters 1 (Experiment 1) and Chapter 9 (Experiment 11), go to the author's website at http://www.ee.calpoly.edu/faculty/rsandige/. 
  • A Karnaugh Map Explorer program is provided to help students learn K-maps. The Karnaugh Map Explorer program will be made available to instructors via the web. For reviewers: to see the program and use it, go to the author's website at http://www.ee.calpoly.edu/faculty/rsandige/ 
  • A special program called EASY1 (Editor/Assembler/Simulator for VBC1 (Very Basic Computer 1)) is provided to help students learn how to write and test assembly language for VBC1. EASY1 will be made available to instructors via the web. VBC1 is a very simple 4-bit Harvard type computer for students to design and learn how to program, since it only has 8 instructions with 22 variations. For reviewers: to see the program and use it, go to the author's website at http://www.ee.calpoly.edu/faculty/rsandige/ 
  • Beginning in Chapter 12, Designing Input/Output Circuits, VHDL is used as a tool to teach students how to design VBC1.
  • The popular Xilinx ISE WebPACK software is use as the design tool for VHDL. This tool contains the ISE synthesizer and built-in ISE simulator to allow students to verify that their designs work prior to downloading them in the Spartan 3E on the Nexys 2 board. Xilinx ISE WebPACK is a free download from Xilinx via their web site.
  • In Chapter 18, VBC1-E is introduced. VBC1-E is an enhanced version of VBC1 with 25 instructions with 71 variations.
Table of Contents
Chapter 1: Boolean Algebra, Boolean Functions, VHDL, and Gates 
Chapter 2: Number Conversions, Codes, and Function Minimization 
Chapter 3: Introduction to Logic Circuit Analysis and Design 
Chapter 4: Combinational Logic Circuit Design with VHDL 
Chapter 5: Bistable Memory Device Design with VHDL 
Chapter 6: Simple Finite State Machine Design with VHDL 
Chapter 7: Computer Circuits 
Chapter 8: Circuit Implementation Techniques 
Chapter 9: Complex Finite State Machine Design with VHDL 
Chapter 10: Basic Computer Architectures 
Chapter 11: Assembly Language Programming for VBC1 
Chapter 12: Designing Input/Output Circuits 
Chapter 13: Designing Instruction Memory, Loading Program Counter, and Debounced Circuit 
Chapter 14: Designing Multiplexed Display Systems 
Chapter 15: Designing Instruction Decoders 
Chapter 16: Designing Arithmetic Logic Units 
Chapter 17: Completing the Design for VBC1 
Chapter 18: Assembly Language Programming for VBC1-E 
Chapter 19: Designing Input/Output Circuits for VBC1-E 
Chapter 20: Designing the Data Memory Circuit for VBC1-E 
Chapter 21: Designing the Arithmetic, Logic, Shift, Rotate, and Unconditional Jump Circuits for VBC1-E 
Chapter 22: Designing a Circuit to Prevent Program Execution During Manual Loading for VBC1-E
Chapter 23: Designing Extented Instruction Memory for VBC1-E 
Chapter 24: Designing the Software Interrupt Circuits for VBC1-E 
Chapter 25: Completing the Design for VBC1-E 
Appendices
Richard S. Sandige, Prof. Emeritus - Cal. Polytechnic State University
Michael L. Sandige, Principal Engineer - WildTangent
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