VHDL: Modular Design and Synthesis of Cores and Systems 3/e (絕)
- 20本以上，享 8.5折
售價
$
洽詢
- 一般書籍
- ISBN：9780071266062
- 作者：Zainalabedin Navabi
- 版次：3
- 年份：2007
- 出版商：McGraw-Hill
- 頁數/規格：531頁/平裝單色
書籍介紹
目錄
Description
Utilize the Latest VHDL Tools and Techniques for Designing Embedded Cores, Cutting-Edge Processors, RT Level Components, and Complex Digital Systems
The classic VHDL: Modular Design and Synthesis of Cores and Systems has been fully updated to cover methodologies of modern design and the latest uses of VHDL for digital system design. The book shows you how to utilize VHDL to create specific constructs for specific hardware parts, focusing on VHDL's new libraries and packages.
This cutting-edge resource explores the design of RT level components; the application of these components in a core-based design; and the development of a complete processor design with its hardware and software as a core in a system-on-a-chip (SoC). Filled with over 150 illustrations, VHDL: Modular Design and Synthesis of Cores and Systems features:
Utilize the Latest VHDL Tools and Techniques for Designing Embedded Cores, Cutting-Edge Processors, RT Level Components, and Complex Digital Systems
The classic VHDL: Modular Design and Synthesis of Cores and Systems has been fully updated to cover methodologies of modern design and the latest uses of VHDL for digital system design. The book shows you how to utilize VHDL to create specific constructs for specific hardware parts, focusing on VHDL's new libraries and packages.
This cutting-edge resource explores the design of RT level components; the application of these components in a core-based design; and the development of a complete processor design with its hardware and software as a core in a system-on-a-chip (SoC). Filled with over 150 illustrations, VHDL: Modular Design and Synthesis of Cores and Systems features:
- An entire toolkit for register-transfer level digital system design
- Testbench development techniques
- Coverage of the latest uses of VHDL for digital system design, design of IP cores, interactive and self checking testbench development, and VHDL's new libraries and packages
Table of Contents
Chapter 1: Digital System Design Automation with VHDL
Chapter 2: RTL with VHDL
Chapter 3: VHDL Constructs for Structure and Hierarchy Descriptions
Chapter 4: Concurrent Constructs for RT Level Descriptions
Chapter 5: Sequential Constructs for RT Level Descriptions
Chapter 6: VHDL Language Utilities and Packages
Chapter 7: VHDL Signal Model
Chapter 8: Hardware Cores and Models
Chapter 9: Core Design and Testability
Chapter 10: Design, Test and Application of a Processor Core
APPENDIX A: VHDL KEYWORDS
APPENDIX B: VHDL LANGUAGE GRAMMAR
APPENDIX C: VHDL STANDARD PACKAGES
APPENDIX D: STD_LOGIC_1164 Package
APPENDIX E: STD_LOGIC_TEXTIO Package
APPENDIX F: STD_LOGIC_ARITH Package
APPENDIX G: STD_LOGIC_SIGNED
APPENDIX H: STD_LOGIC_UNSIGNED
APPENDIX I: math_real Package
Chapter 1: Digital System Design Automation with VHDL
Chapter 2: RTL with VHDL
Chapter 3: VHDL Constructs for Structure and Hierarchy Descriptions
Chapter 4: Concurrent Constructs for RT Level Descriptions
Chapter 5: Sequential Constructs for RT Level Descriptions
Chapter 6: VHDL Language Utilities and Packages
Chapter 7: VHDL Signal Model
Chapter 8: Hardware Cores and Models
Chapter 9: Core Design and Testability
Chapter 10: Design, Test and Application of a Processor Core
APPENDIX A: VHDL KEYWORDS
APPENDIX B: VHDL LANGUAGE GRAMMAR
APPENDIX C: VHDL STANDARD PACKAGES
APPENDIX D: STD_LOGIC_1164 Package
APPENDIX E: STD_LOGIC_TEXTIO Package
APPENDIX F: STD_LOGIC_ARITH Package
APPENDIX G: STD_LOGIC_SIGNED
APPENDIX H: STD_LOGIC_UNSIGNED
APPENDIX I: math_real Package
